%FILENAME%
vtr-9.0.0-1-aarch64.pkg.tar.zst

%NAME%
vtr

%BASE%
vtr

%VERSION%
9.0.0-1

%DESC%
Verilog to Routing -- Open Source CAD Flow for FPGA Research

%CSIZE%
10927084

%ISIZE%
24507859

%SHA256SUM%
e32d6dedef55e5330b8fbfaeeec88d4df8c21b8a7dc7a3724762306f9c7ffbbe

%URL%
https://verilogtorouting.org

%LICENSE%
MIT

%ARCH%
aarch64

%BUILDDATE%
1767486300

%PACKAGER%
Ben Schneider <ben@bens.haus>

%DEPENDS%
ctags
tbb

%MAKEDEPENDS%
cmake
wget

